![]() ![]() They then optimized the model, adding multiple synchronous clocks to make the most efficient use of available FPGA resources. INFRAREDX DAVE ERICKSON CODETo implement the design on the Cyclone FPGA, the team generated VHDL ® code from the Simulink model with HDL Coder. ![]() At this milestone, management committed to using HDL Coder for the FPGA implementation. The team demonstrated the validated model to Infraredx management. Using Fixed-Point Designer™, they converted the floating-point Simulink model to fixed point, and performed bit-true simulations to evaluate the effects of precision adjustments on image quality. They ran simulations and verified the Simulink model by comparing its output with the output produced by the MATLAB algorithms. The team of Infraredx scientists and MathWorks Consulting Services created a Simulink model based on these algorithms, using Simulink blocks to implement FIR filters, IIR filters, and other elements of the signal and image processing pipeline. Infraredx scientists and engineers developed their initial algorithms in MATLAB. MathWorks consultants provided training to enable Infraredx engineers and scientists to use Simulink and HDL Coder themselves on future versions of the product. Infraredx worked with MathWorks Consulting Services to speed the development and FPGA implementation of the next-generation IVUS system. Our goal was to develop the expertise in-house so that we could do the work ourselves.” Solution “Outside companies were willing to help, but they wanted to do the work for us from start to finish. “We had the ability to develop image processing and signal processing algorithms, but we lacked the HDL proficiency to implement them on an FPGA,” says Dave Erickson, principal electrical engineer at Infraredx. Further, the initial implementation consumed almost all the multipliers and other resources on the FPGA, leaving virtually no room for the improved filters and other features that Infraredx had planned. This arrangement slowed development and made it impossible for Infraredx scientists to rapidly evaluate new ideas for their algorithms. The Infraredx team relied on a contractor to implement enhancements and fixes to the HDL. Although the code was operational, hand-coding was not a feasible long-term solution. Infraredx implemented the first version of its IVUS system by handwriting HDL code for an Intel ® (formerly Altera ®) Cyclone FPGA. “More importantly the consultants taught us how we could accelerate FPGA implementation on future projects ourselves by using Simulink and HDL Coder.” Challenge Zhihua He, principal imaging scientist at Infraredx. “On the first project that we worked on with MathWorks Consulting Services, we cut development time in half by generating HDL for our core IVUS algorithms,” says Dr. Infraredx engaged MathWorks Consulting Services to accelerate the development and FPGA implementation of the IVUS signal and image processing algorithms in the TVC Imaging System using MATLAB ®, Simulink ®, and HDL Coder™. ![]() ![]() It combines near-infrared spectroscopy (NIRS) with intravascular ultrasound (IVUS) in a single coronary catheter to provide information about vessel composition and structure. The TVC Imaging System is the only FDA-approved medical device for LCP detection. To help cardiologists detect LCP, Infraredx developed the TVC Imaging System™. A patient with lipid core plaques (LCP) is more vulnerable to coronary artery disease (CAD), the number one killer in developed countries such as the United States. ![]()
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